Field of the Invention
The present invention relates to a semiconductor chip temperature estimation device included in, for example, a semiconductor module, and to an overheat protection device for protecting a power converter from an overheat accident using the temperature estimation device.
Description of Related Art
For a power converter in which a semiconductor module is mounted, there is a method whereby the temperature of a semiconductor chip included in the semiconductor module is estimated, and the current flowing through the semiconductor chip is limited before the estimated temperature exceeds an allowable temperature and causes destruction, thereby realizing overheat protection of the semiconductor chip and power converter. Such related art that estimates semiconductor chip temperature is disclosed in a paragraph [0006] FIG. 1, and the like of Japanese Patent No. 3,075,303 (Patent Document 1) and paragraphs [0021] to [0030], FIG. 1, and the like of Japanese Patent Application Laid-Open Publication No. 2005-124387 (Patent Document 2).
FIG. 7 is a block diagram showing the related art described in Patent Document 1. In FIG. 7, 101 is a rectifier circuit connected to a 3-phase alternating current power supply (not shown), 102 is a smoothing capacitor, 103 is a heat sink in which are installed an inverter 104 and thermistor 105, and 106 is a motor driven by the inverter 104. Also, 200 is a control device that controls a semiconductor switching element of the inverter 104, 201 and 202 are first and second set temperatures, 203 is a current detector, 204 and 205 are comparators, 206 is a current interrupting function, 207 is a current limiting function, 208 is a PWM control unit, 209 is a temperature detection unit, and 210 is a Tj (junction temperature) estimation unit.
In such related art, a temperature detection value of the heat sink 103 obtained by the thermistor 105 and temperature detection unit 209, a value of the current of the motor 106 detected by the current detector 203, and a drive signal (carrier frequency) from the PWM control unit 208 are input into the Tj estimation unit 210. Temperature rise in accordance with “chip loss” (power loss) of a semiconductor chip including conduction loss and switching loss is calculated based on the current detection value and drive signal in the Tj estimation unit 210, and the temperature rise is added to the temperature detection value of the heat sink 103, thereby estimating the junction temperature (semiconductor chip temperature) of the semiconductor switching element. Further, when the estimated semiconductor chip temperature exceeds the first set temperature 201, the current of the inverter 104 is limited by the current limiting function 207, while when the semiconductor chip temperature exceeds the second set temperature 202, which is higher than the first set temperature 201, the current of the inverter 104 is interrupted by the current interrupting function 206, thereby realizing overheat protection.
A power converter control device that, when a synchronous motor takes on a stalled state, limits the output current of the inverter so that the semiconductor chip temperature estimation value does not exceed an allowed value is disclosed in Patent Document 2.
In the related art described in Patent Documents 1 and 2, a detected temperature value detected by a temperature sensor such as a thermistor is taken to be temperature of a cooling body or cooling medium for cooling a semiconductor chip, and the temperature of the semiconductor chip is estimated by adding a temperature rise caused by semiconductor chip loss and the detected temperature value detected by the temperature sensor. For example, FIG. 8 is a schematic view showing a semiconductor chip temperature estimation function in the Tj estimation unit 210 of FIG. 7, wherein 210a is temperature rise estimation means, 210b is adder and subtractor means, 210c is a semiconductor chip loss calculation unit, and 210d is a semiconductor chip temperature rise calculation unit. As shown in the drawing, a value that is the estimated value of the temperature rise caused by semiconductor chip loss and a value of temperature detected by the thermistor 105 added together is output as a semiconductor chip temperature estimation value in the Tj estimation unit 210.